課程資訊
課程名稱
積體電路測試
Vlsi Testing 
開課學期
112-2 
授課對象
電機資訊學院  電機工程學研究所  
授課教師
李建模 
課號
EEE5001 
課程識別碼
943EU0010 
班次
 
學分
3.0 
全/半年
半年 
必/選修
選修 
上課時間
星期二2,3,4(9:10~12:10) 
上課地點
綜401 
備註
本課程以英語授課。上課地點:綜合401。
總人數上限:42人 
 
課程簡介影片
 
核心能力關聯
核心能力與課程規劃關聯圖
課程大綱
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課程概述

This course introduce basic concepts of VLSI testing. This course will cover both theoretic and practical aspects of testing techniques of VLSI circuits from EDA (electronic design automation) point of view. This is a flipped classroom where students are required to watch video at home and attend the class for discussion. This course also requires students to implement a mini EDA tool, automatic test generator (ATPG). This course requires a final team project where students can put together what they learned in the class. The course focuses mainly on digital VLSI circuits. 

課程目標
Students will learn important concepts of VLSI testing knowledge required for both designers and EDA engineers. Students will also learn to implement a EDA tool, automatic test generator (ATPG). 
課程要求
C++ coding ability. Logic design and VLSI design background. 
預期每週課後學習時數
 
Office Hours
 
指定閱讀
 
參考書目
Prof. Li's Video and PPT.

https://www.youtube.com/watch?v=nX0XCD0ggHs&list=PLvd8d-SyI7hjk_Ci0zpTqImAtpEjdK5JF&ab_channel=%E6%9D%8E%E5%BB%BA%E6%A8%A1
 
評量方式
(僅供參考)
   
針對學生困難提供學生調整方式
 
上課形式
以錄音輔助, 以錄影輔助
作業繳交方式
考試形式
其他
課程進度
週次
日期
單元主題
Week 01-16
  introduction, Logic Simulation, Fault Modeling, Fault Simulation, Test Generation, Diagnosis, Built-in Self Test, Test Compression, Memory testing.